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INTEGRATED CIRCUITS
74F164 8-bit serial-in parallel-out shift register
Product specification IC15 Data Handbook 1995 Sep 22
Philips Semiconductors
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
FEATURES
* Gated serial data inputs * Typical shift frequency of 100MHz * Asynchronous Master Reset * Buffered clock and data inputs * Fully synchronous data transfer * Industrial temperature range available (-40C to +85C)
DESCRIPTION
The 74F164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered through one of two inputs (Dsa, Dsb); either input can be used as an active High enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied High. Data shifts one place to the right on each Low-to-High transition of the clock (CP) input, and enters into Q0 the logical AND of the two data inputs (Dsa, Dsb) that existed one setup time before the rising edge. A Low level on the Master Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all outputs Low.
PIN CONFIGURATION
Dsa Dsb Q0 Q1 Q2 Q3 GND 1 2 3 4 5 6 7 14 VCC 13 Q7 12 Q6 11 Q5 10 Q4 9 8 MR CP
SF00717
TYPE 74F164
TYPICAL fmax 100MHz
TYPICAL SUPPLY CURRENT (TOTAL) 33mA
ORDERING INFORMATION
ORDER CODE DESCRIPTION 14-pin plastic DIP 14-pin plastic SO COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C 74F164N 74F164D INDUSTRIAL RANGE VCC = 5V 10%, Tamb = -40C to +85C I74F164N I74F164D DRAWING NUMBER SOT27-1 SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS Dsa, Dsb CP MR Q0 - Q7 Data inputs Clock pulse input (active rising edge) Master reset input (active-Low) Data outputs DESCRIPTION 74F (U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 50/33 LOAD VALUE HIGH/LOW 20A/0.6mA 20A/0.6mA 20A/0.6mA 1.0mA/20mA
One (1.0) FAST unit load is defined as: 20A in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
SRG8 8 9 1 2 1 R & C1/
8 9
CP MR
Dsa
Dsb
2
1D
3 4 5 6 10
Q0 Q1 Q3 Q4 Q0 Q1 Q3 Q4
3
4
5
6 10 11
12 13
11 12 13
VCC = Pin 14 GND = Pin 7
SF00713
SF00714
1995 Sep 22
2
853-0348 15794
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
LOGIC DIAGRAM
Dsa Dsb 1 2 D Q CP RD 8 D Q CP RD D Q CP RD D Q CP RD D Q CP RD D Q CP RD D Q CP RD D Q CP RD
CP
MR 9 VCC = Pin 14 GND = Pin 7 3 Q0 Q1 4 Q2 5 Q3 6 10 Q4 11 Q5 12 Q6 13 Q7
SF00715
FUNCTION TABLE
INPUTS MR L H H H H H h L l qn X = = = = = = = CP X Dsa X l l h h Dsb X l h l h Q0 L L L L H Q1 L q0 q0 q0 q0 Q2 L q1 q1 q1 q1 OUTPUTS Q3 L q2 q2 q2 q2 Q4 L q3 q3 q3 q3 Q5 L q4 q4 q4 q4 Q6 L q5 q5 q5 q5 Q7 L q6 q6 q6 q6 Shift Reset (Clear) OPERATING MODE
High voltage level High voltage level one setup time prior to the Low-to-High clock transition. Low voltage level Low voltage level one setup time prior to the Low-to-High clock transition. Lower case letter indicate the state of the referenced output one setup time prior to the Low-to-High clock transition. Don't care Low-to-High clock transition
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb b Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Commercial Range Operating free-air tem erature range temperature O erating Storage temperature range Industrial Range PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 40 0 to +70 -40 to +85 -65 to +150 UNIT V V mA V mA C C
RECOMMENDED OPERATING CONDITIONS
LIMIT SYMBOL VCC VIH VIL IIk IOH IOL Tamb b Supply voltage High-level iput voltage Low-level input voltage Input clamp current High-level output current Low-level output current Commercial Range O erating Operating free-air tem erature range temperature Industrial Range 0 -40 PARAMETER MIN 4.5 2.0 0.8 -18 -1 20 +70 +85 NOM 5.0 MAX 5.5 UNIT V V V mA mA mA C
1995 Sep 22
3
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) TEST SYMBOL PARAMETER CONDITIONS1 VCC = MIN, VIL = MAX, VIH = MIN, IOH = MAX VCC = MIN, VIL = MAX, VIH = MIN, IOL= MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX VCC = MAX -60 33 MIN LIMITS TYP2 MAX V 3.4 0.30 0.30 -0.73 0.50 0.50 -1.2 100 20 -0.6 -150 55 V V V V A A mA mA mA UNIT
VOH VOL
High-level out ut voltage output Low-level output voltage
10%VCC 5%VCC 10%VCC 5%VCC
2.5 2.7
VIK II IIH IILL IOS ICC
Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short-circuit output current3 Supply current (total)4
Notes to DC electrical characteristics 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter test, IOS tests should be performed last. 4. Measure ICC with the serial inputs grounded, the clock input at 2.4V, and a momentary ground, then applied to Master Reset, and all outputs open.
APPLICATION
RESET CLOCK CP DATA ENABLE Dsa 74F164 Dsb Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 H Dsb Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 MR Dsa 74F164 CP MR
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9 D10 D11 D12 D13 D14 D15
The 74F164 can be cascaded to form synchronous shift registers of longer length. Here, two devices are combined to form a 16-bit shift register.
SF00716
1995 Sep 22
4
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
AC ELECTRICAL CHARACTERISTICS
LIMITS TEST CONDITION Tamb = +25C +25 C VCC = 5V CL = 50pF RL = 500 MIN fmax tPLH tPHL tPHL Maximum clock frequency Propagation delay CP to Qn Propagation delay MR to Qn Waveform 1 Waveform 1 Waveform 3 80 3.0 5.0 5.5 TYP 100 5.0 7.0 7.5 8.0 10.0 10.5 MAX Tamb = 0C to +70C 0 C +70 C VCC = +5V10% CL = 50pF RL = 500 MIN 80 2.5 5.0 5.5 9.0 11.0 11.5 MAX Tamb = -40C to +85C 40 C +85 C VCC = +5V10% CL = 50pF RL = 500 MIN 80 2.5 5.0 5.5 9.0 11.0 11.5 MAX MHz ns ns
SYMBOL
PARAMETER
UNIT
AC SETUP REQUIREMENTS
LIMITS TEST CONDITION Tamb = +25C +25 C VCC = 5V CL = 50pF RL = 500 MIN ts(H) tS(L) th(H) th(L) tw(H) tw(L) tw(L) tREC Setup time, High or Low Dn to CP Hold time, High or Low Dn to CP CP Pulse width High or Low MR Pulse wicth Low Recovery time MR to CP Waveform 2 Waveform 2 Waveform 1 Waveform 3 Waveform 3 7.0 7.0 1.0 1.0 4.0 7.0 7.0 7.0 TYP MAX Tamb = 0C to +70C 0 C +70 C VCC = +5V10% CL = 50pF RL = 500 MIN 7.0 7.0 2.0 2.0 4.0 7.0 7.0 7.0 MAX Tamb = -40C to +85C 40 C +85 C VCC = +5V10% CL = 50pF RL = 500 MIN 7.0 7.0 2.0 2.0 4.0 7.0 7.0 7.0 MAX ns ns ns ns ns
SYMBOL
PARAMETER
UNIT
AC WAVEFORMS
For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
1/fmax MR CP VM tw(H) tPHL VM tw(L) tPLH VM CP tPHL VM VM tw(L) tREC VM VM VM
Qn
SF00294
Qn
Waveform 1. Propagation delay for Clock input to output, Clock Pulse width, and maximum Clock frequency
VM
SF00158
Waveform 3. Master Reset pulse width, Master Reset to output delay and Master Reset to Clock recovery time
Dn VM ts(H) CP VM th(H) VM ts(L) VM th(L)
VM
VM
SF00191
Waveform 2. Data setup and hold times
1995 Sep 22
5
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
TEST CIRCUIT AND WAVEFORMS
VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)
tTLH (tr ) 90% POSITIVE PULSE VM 10% tw
tTHL (tf ) AMP (V) 90% VM 10% 0V
Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00006
1995 Sep 22
6
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
1995 Sep 22
7
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
1995 Sep 22
8
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
NOTES
1995 Sep 22
9
Philips Semiconductors
Product specification
8-bit serial-in parallel-out shift register
74F164
Data sheet status
Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1998 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 10-98 9397-750-05085
Philips Semiconductors
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